1. 02 Jun, 2020 1 commit
  2. 17 Jul, 2019 1 commit
  3. 12 Jul, 2019 1 commit
  4. 01 Apr, 2019 2 commits
  5. 21 Mar, 2019 1 commit
  6. 14 Mar, 2019 1 commit
  7. 13 Mar, 2019 3 commits
  8. 05 Mar, 2019 1 commit
  9. 04 Mar, 2019 1 commit
  10. 27 Feb, 2019 6 commits
  11. 26 Feb, 2019 1 commit
  12. 21 Feb, 2019 1 commit
  13. 15 Feb, 2019 1 commit
  14. 12 Feb, 2019 2 commits
    • Haoran.Wang's avatar
      MA-13239 imx8qm: Touch correct pad for UART0 · e4a5b4a8
      Haoran.Wang authored
      Due imx8qm_mek's UART0_RTS_B and UART0_CTS_0 pad
      reuse to be the UART2 for base bard which operated by
      M4_1, so don't touch these two pads in ATF.
      Signed-off-by: default avatarHaoran.Wang <elven.wang@nxp.com>
      Acked-by: default avatarPete Zhang <pete.zhang@nxp.com>
      e4a5b4a8
    • Anson Huang's avatar
      gic: make sure ProcessorSleep bit clear successfully · e251ea3f
      Anson Huang authored
      GICR_WAKER.ProcessorSleep can only be set to zero when:
      — GICR_WAKER.Sleep bit[0] == 0.
      — GICR_WAKER.Quiescent bit[31] == 0.
      
      On some platforms, when system reboot with GIC in sleep
      mode but with power ON, such as on NXP's i.MX8QM, Linux
      kernel enters suspend but could be requested to reboot,
      and GIC is in sleep mode and it is inside a power domain
      which is ON in this scenario, when CPU reset, the GIC
      driver trys to set CORE's redistributor interface to awake,
      with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31]
      both set, the ProcessorSleep bit[1] will never be clear
      and cause system hang.
      
      This patch makes sure GICR_WAKER.Sleep bit[0] and
      GICR_WAKER.Quiescent bit[31] are both zeor before clearing
      ProcessorSleep bit[1].
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      (cherry picked from commit 4436f3a4)
      e251ea3f
  15. 11 Feb, 2019 2 commits
    • Anson Huang's avatar
      imx: enable IRQ steer wakeup source support · 854729ba
      Anson Huang authored
      Enable IRQ steer wakeup source support for Linux kernel
      wakeup sources like debug UART wakeup etc..
      Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
      854729ba
    • Ye Li's avatar
      imx8qm/qxp: Protect the lower 96K ocram used for SPL · 96d33120
      Ye Li authored
      Because the partition reboot won't reload the first level bootloader (SPL),
      the SPL won't be authenticated. Users can corrupt the SPL image to break
      the boot trust chain in secure boot if we don't protect that OCRAM area.
      
      This patch configures the memory area from 0x0 to 0x118000 only accessed by
      secure partition (ATF and OPTEE). Non-secure partitions (u-boot and kernel)
      can't access it.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 1eff7d3ef6f121782e56bb1807744ede48b8580b)
      96d33120
  16. 10 Feb, 2019 1 commit
  17. 07 Feb, 2019 13 commits
  18. 25 Jan, 2019 1 commit