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Ranjani Vaidyanathan authored
When ARM enters WFI in low power IDLE state, float the DDR IO pins to drop the power on the VDDHIGH rail. Need to run WFI code from IRAM since DDR needs to be put into self-refresh before changing the IO pins. Drop AHB to 8MHz and DDR to 1MHz when ARM is in WFI when in IDLE state. Set IPG_PERCLK to run at 3MHz, since we want to maintain a 1:2.5 ratio between PERCLK to AHB_CLK. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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