• Ranjani Vaidyanathan's avatar
    ENGR00179574: MX6- Add bus frequency scaling support · e49e9103
    Ranjani Vaidyanathan authored
    Add support for scaling the bus frequency (both DDR
    and ahb_clk).
    The DDR and AHB_CLK are dropped to 24MHz when all devices
    that need high AHB frequency are disabled and the CORE
    frequency is at the lowest setpoint.
    The DDR is dropped to 400MHz for the video playback usecase.
    In this mode the GPU, FEC, SATA etc are disabled.
    
    To scale the bus frequency, its necessary that all cores
    except the core that is executing the DDR frequency change
    are in WFE. This is achieved by generating interrupts on
    un-used interrupts (Int no 139, 144, 145 and 146).
    Signed-off-by: default avatarRanjani Vaidyanathan <ra5478@freescale.com>
    e49e9103
board-mx6q_sabrelite.c 33.7 KB