ENGR00213014-5 MX6x SabreSD: IOMUX setting for HDMI HDCP

Added enable_pins/disable_pins functions for Mx6q/dl sabresd HDMI.
Added HDMI DDC IOMUX setting.
Signed-off-by: Sandor Yu <R01008@freescale.com>

arch/arm/mach-mx6/board-mx6dl_sabresd.h

@@ -390,4 +390,13 @@ static iomux_v3_cfg_t mx6dl_arm2_elan_pads[] = {
 	MX6DL_PAD_EIM_D28__GPIO_3_28,
 };
 
+static iomux_v3_cfg_t mx6dl_sabresd_hdmi_ddc_pads[] = {
+	MX6DL_PAD_KEY_COL3__HDMI_TX_DDC_SCL, /* HDMI DDC SCL */
+	MX6DL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA, /* HDMI DDC SDA */
+};
+
+static iomux_v3_cfg_t mx6dl_sabresd_i2c2_pads[] = {
+	MX6DL_PAD_KEY_COL3__I2C2_SCL,	/* I2C2 SCL */
+	MX6DL_PAD_KEY_ROW3__I2C2_SDA,	/* I2C2 SDA */
+};
 #endif

arch/arm/mach-mx6/board-mx6q_sabresd.c

@@ -1264,8 +1264,34 @@ static void hdmi_init(int ipu_id, int disp_id)
 	mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting);
 }
 
+/* On mx6x sabresd board i2c2 iomux with hdmi ddc,
+ * the pins default work at i2c2 function,
+ when hdcp enable, the pins should work at ddc function */
+
+static void hdmi_enable_ddc_pin(void)
+{
+	if (cpu_is_mx6dl())
+		mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_hdmi_ddc_pads,
+			ARRAY_SIZE(mx6dl_sabresd_hdmi_ddc_pads));
+	else
+		mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_hdmi_ddc_pads,
+			ARRAY_SIZE(mx6q_sabresd_hdmi_ddc_pads));
+}
+
+static void hdmi_disable_ddc_pin(void)
+{
+	if (cpu_is_mx6dl())
+		mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_i2c2_pads,
+			ARRAY_SIZE(mx6dl_sabresd_i2c2_pads));
+	else
+		mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_i2c2_pads,
+			ARRAY_SIZE(mx6q_sabresd_i2c2_pads));
+}
+
 static struct fsl_mxc_hdmi_platform_data hdmi_data = {
 	.init = hdmi_init,
+	.enable_pins = hdmi_enable_ddc_pin,
+	.disable_pins = hdmi_disable_ddc_pin,
 };
 
 static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {

arch/arm/mach-mx6/board-mx6q_sabresd.h

@@ -128,9 +128,9 @@ static iomux_v3_cfg_t mx6q_sabresd_pads[] = {
 	MX6Q_PAD_CSI0_DAT8__I2C1_SDA,
 	MX6Q_PAD_CSI0_DAT9__I2C1_SCL,
 
-	/* I2C2 Camera, MIPI */
-	MX6Q_PAD_KEY_COL3__I2C2_SCL,	/* GPIO4[12] */
-	MX6Q_PAD_KEY_ROW3__I2C2_SDA,	/* GPIO4[13] */
+	/* I2C2, Camera, MIPI */
+	MX6Q_PAD_KEY_COL3__I2C2_SCL,
+	MX6Q_PAD_KEY_ROW3__I2C2_SDA,
 
 	/* I2C3 */
 	MX6Q_PAD_GPIO_3__I2C3_SCL,	/* GPIO1[3] */
@@ -288,4 +288,14 @@ static iomux_v3_cfg_t mx6q_sabresd_mipi_sensor_pads[] = {
 	MX6Q_PAD_SD1_DAT2__GPIO_1_19,		/* camera PWDN */
 	MX6Q_PAD_SD1_CLK__GPIO_1_20,		/* camera RESET */
 };
+
+static iomux_v3_cfg_t mx6q_sabresd_hdmi_ddc_pads[] = {
+	MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL, /* HDMI DDC SCL */
+	MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA, /* HDMI DDC SDA */
+};
+
+static iomux_v3_cfg_t mx6q_sabresd_i2c2_pads[] = {
+	MX6Q_PAD_KEY_COL3__I2C2_SCL,	/* I2C2 SCL */
+	MX6Q_PAD_KEY_ROW3__I2C2_SDA,	/* I2C2 SDA */
+};
 #endif