Commit 9a3e9491 authored by Michael Schanz's avatar Michael Schanz
Browse files

CGT000009 QMX6: support for UART3 and UART5



add support for UART3 and UART5 in conga-QMX6 device tree configuration
Signed-off-by: Michael Schanz's avatarMichael Schanz <michael.schanz@congatec.com>
parent 9bafbcba
......@@ -365,6 +365,33 @@
};
};
uart3 {
pinctrl_uart3_2: uart3grp-2 {
fsl,pins = <
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
>;
};
pinctrl_uart3_3: uart3grp-3 {
fsl,pins = <
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
>;
};
};
uart5 {
pinctrl_uart5_1: uart5grp-1 {
fsl,pins = <
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
>;
};
};
hog {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
......@@ -440,6 +467,18 @@
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_2>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5_1>;
status = "okay";
};
&usbh1 {
status = "okay";
};
......
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