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Best regards, congatec ARM software team

  1. 28 Nov, 2012 1 commit
  2. 15 Nov, 2012 1 commit
  3. 14 Nov, 2012 1 commit
  4. 06 Nov, 2012 7 commits
    • Adrian Alonso's avatar
      ENGR00231266-1: fsl_devices add csi_tx_addr · 4f0137bd
      Adrian Alonso authored
      * Add csi_tx_addr, so it can override slave addr
        for adv7280 tvin decoder device
      Signed-off-by: default avatarAdrian Alonso <>
    • Chen Liangjun's avatar
      ENGR00231773-8 ASRC: prevent user app from processing input/output processing · 29d7200e
      Chen Liangjun authored
      To finish a buffer convert in ASRC, user should 1. prepare input buffer,
      2. prepare output buffer 3. wait for output buffer's completion 4.wait
      for input buffer's comletion. The flow make user application ugly.
      In this patch, pack steps above to 1 stop: ASRC_CONVERT.
      Signed-off-by: default avatarChen Liangjun <>
    • Chen Liangjun's avatar
      ENGR00231773-5 ASRC: use poll mode to receive last period of ASRC data · f10e0cf7
      Chen Liangjun authored
      ASRC driver use DMA to transfer data from ASRC output FIFO to memory.
      However, DMA way require the data number in ASRC output FIFO being larger
      than watermark level. Thus a dma request can trigger a DMA burst. For
      the last period of output data, its number is possiblely less than output
      FIFO watermark level. In this case, the output DMA would pending for the
      last period of output data until timeout.
      In this patch:
      	1 divide expected output data length into 2 parts: DMA part
      and poll part. Using DMA to get the DMA part data and poll mode to
      get the poll part.
      	2 to prevent user from processing these 2 parts above, kernel
      buffers would be untouchable. User application only need send its data
      buffer address to driver instead of query the kernel buffer.
      Signed-off-by: default avatarChen Liangjun <>
    • Chen Liangjun's avatar
      ENGR00231773-4 ASRC: use scatter list and stall bit for asrc convert · e49af268
      Chen Liangjun authored
      In the origin code, ASRC driver use cyclic way to process DMA task
      transfering data to/from ASRC input/output FIFO. In this case, it is
      necessary that user application should promise that the input buffer
      flow is continuous. If not, there would be 0 data be inserted into data
      flow. The output data would be noisy.
      In this patch,
      	1 use scatter list instead of cyclic SDMA: with scatter list,
      SDMA would stop when the applied scatter list nents are finished.
      	2 set stall bit for ASRC "memory->ASRC->memory" convert to stop
      ASRC convert when input data is not send into ASRC input FIFO in time.
      Signed-off-by: default avatarChen Liangjun <>
    • Chen Liangjun's avatar
      ENGR00231773-3 ASRC: use kzalloc to allocate buffer to support scatterlist · 9e81e368
      Chen Liangjun authored
      For ASRC's "memory -> ASRC -> memory" using, new driver would support
      model below: user input one buffer into ASRC and an corresponding output
      buffer would be poped out. There is no timing requirement between this
      input buffer and next input buffer. Thus driver would not use the cyclic
      way to config SDMA and scatterlist is used. buffer allocated by
      dma_alloc_coherent() can't support scatterlist well.
      In this patch, use kzalloc to allocate buffer to support scatterlist.
      Signed-off-by: default avatarChen Liangjun <>
    • Chen Liangjun's avatar
      ENGR00231773-2 ASRC: add work struct for asrc output data receive · 07eeb987
      Chen Liangjun authored
      SDMA driver can't promise receive all output data generated. Cause when
      the data in output FIFO is less than ASRC output FIFO watermark, there
      would be no DMA request generated and thus no SDMA transfer would
      In this patch, add work struct to support ASRC driver receive last part
      of data in OUTPUT FIFO in polling way.
      Signed-off-by: default avatarChen Liangjun <>
    • Chen Liangjun's avatar
      ENGR00231773-1 ASRC: remove queue operation in ASRC driver · 9ad976c9
      Chen Liangjun authored
      According to ASRC memory->ASRC->memory requirement, driver should
      satisfy the feature below: user application would passed into one buffer
      and waiting until the output buffer is generated. In this case, only one
      buffer is on processing and it is no necessary to use the queue to do
      the convert. What is worse, queue operation would make the ASRC driver
      hard to understand and maintain.
      In this patch, remove the queue operation in ASRC driver.
      Signed-off-by: default avatarChen Liangjun <>
  5. 24 Oct, 2012 1 commit
  6. 15 Oct, 2012 1 commit
    • Jack Lee's avatar
      ENGR00223348 EPDC: Unable to enable DISPLAY regulator · 6337b956
      Jack Lee authored
      In the maxim 17135 driver, the power good is confirmed by the
      power good GPIO polarity change when comparing the status at
      the beginning of driver probe and display regulator enabled.
      However, it is not reliable since the initial value of the GPIO
      is not constant. Normally, it is 1 but it can be 0 after system reset
      unexpectedly. Now, it is changed to POK bit checking in FAULT register.
      Signed-off-by: default avatarJack Lee <>
  7. 29 Sep, 2012 1 commit
  8. 25 Sep, 2012 1 commit
  9. 19 Sep, 2012 1 commit
  10. 13 Sep, 2012 1 commit
    • Chen Liangjun's avatar
      ENGR00224245 HDMI AUDIO: stop/start PCM while unplug,blank/plug, unblank · f8dd4f6f
      Chen Liangjun authored
      When unplug, blank happens, HDMI audio can't play properly. So in
      driver, audio pcm would be disconnected when event above happens.
      However, pulse audio can't process disconnect event properly and if an
      blank or unplug event happens, HDMI sink would lost and can't be back
      In this patch, instead of disconnecting audio PCM stream, triggering
      stop audio pcm while unplug and blank, triggering start again while plug
      and unblank if the audio pcm is triggerd stop in the unplug/blank event.
      Signed-off-by: default avatarChen Liangjun <>
  11. 12 Sep, 2012 1 commit
  12. 07 Sep, 2012 1 commit
    • Huang Shijie's avatar
      mtd: nand: add 'oob_required' argument to NAND {read,write}_page interfaces · 7edba6de
      Huang Shijie authored
      New NAND controllers can perform read/write via HW engines which don't expose
      OOB data in their DMA mode. To reflect this, we should rework the nand_chip /
      nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB
      data in the nand_chip.oob_poi buffer. A better interface includes a boolean
      argument that explicitly tells the callee when OOB data is requested by the
      calling layer (for reading/writing to/from nand_chip.oob_poi).
      This patch adds the 'oob_required' parameter to each relevant {read,write}_page
      interface; all 'oob_required' parameters are left unused for now. The next
      patch will set the parameter properly in the nand_base.c callers, and follow-up
      patches will make use of 'oob_required' in some of the callee functions.
      Note that currently, there is no harm in ignoring the 'oob_required' parameter
      and *always* utilizing nand_chip.oob_poi, but there can be
      performance/complexity/design benefits from avoiding filling oob_poi in the
      common case. I will try to implement this for some drivers which can be ported
      Note: I couldn't compile-test all of these easily, as some had ARCH
      [Huang Shijie: I remove the unused code for the other drivers.]
      [dwmw2: Merge later 1/0 vs. true/false cleanup]
      Signed-off-by: default avatarBrian Norris <>
      Reviewed-by: default avatarShmulik Ladkani <>
      Acked-by: default avatarJiandong Zheng <>
      Acked-by: default avatarMike Dunn <>
      Signed-off-by: default avatarArtem Bityutskiy <>
      Signed-off-by: default avatarDavid Woodhouse <>
      Signed-off-by: default avatarHuang Shijie <>
  13. 29 Aug, 2012 1 commit
  14. 22 Aug, 2012 1 commit
    • Ryan QIAN's avatar
      ENGR00219601-02: mmc: sdhci: revise pre_req & post_req to improve performance · 16f59122
      Ryan QIAN authored
      Test Env:
      1. MX6DL SabreSD board.
      2. On board eMMC (Sandisk: SDIN5C2-8G) running at 8-bit DDR @ 52MHz.
      3. Test commands:
        3.1 Writing command:
        # dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=100 conv=fsync
        3.2 Reading command:
        # echo 1 > /proc/sys/vm/drop_caches
        # echo 1 > /proc/sys/vm/drop_caches
        # sleep 1
        # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=100
      Performance result with this patch:
      | CPU freq | SDMA (512KB) | SDMA (64KB) |    ADMA     |
      |   1Ghz   |  ~11MB/s (w) | ~5MB/s (w)  | ~11MB/s (w) |
      |          |  ~25MB/s (r) | ~25MB/s (r) | ~23MB/s (r) |
      |  200Mhz  |  ~8MB/s (w)  | ~5MB/s (w)  | ~9MB/s (w)  |
      |          |  ~16MB/s (r) | ~20MB/s (r) | ~13MB/s (r) |
      Performance result without this patch:
      | CPU freq | SDMA (512KB) | SDMA (64KB) |    ADMA     |
      |   1Ghz   |  ~10MB/s (w) | ~5MB/s (w)  | ~10MB/s (w) |
      |          |  ~22MB/s (r) | ~23MB/s (r) | ~22MB/s (r) |
      |  200Mhz  |  ~8MB/s (w)  | ~4MB/s (w)  | ~8MB/s (w)  |
      |          |  ~13MB/s (r) | ~16MB/s (r) | ~11MB/s (r) |
      Signed-off-by: default avatarRyan QIAN <>
  15. 16 Aug, 2012 1 commit
  16. 14 Aug, 2012 1 commit
  17. 09 Aug, 2012 1 commit
  18. 30 Jul, 2012 1 commit
    • Chen Liangjun's avatar
      ENGR00218421-2 ESAI_ASRC:Add support for p2p virtual device playback · 253214e2
      Chen Liangjun authored
      In the origin code, ESAI driver supoprt audio p2p playback by setting
      input PCM data's sample rate thought amixer interface.It is ugly and
      request user application call amixer control interface everytime before
      and playback.
      In this patch, user can call the audio p2p playback by writing data to
      an special virtual device. Driver would automatically get the params of
      input PCM. At the same time, driver would get the output sample rate and
      word data. With the data abover, driver can  set ASRC properly and audio
      p2p palyback is support.
      This patch mainly focus on:
      	1 clean old p2p playback way for ESAI.
      	2 Setup the output sample rate and word width to virtual
      	device's substream_runtime's private data. Everytime the virtual
      	device is called, the data abover is used for config ASRC, ESAI,
      	and codec.
      Signed-off-by: default avatarChen Liangjun <>
  19. 27 Jul, 2012 1 commit
  20. 25 Jul, 2012 4 commits
  21. 20 Jul, 2012 11 commits
    • Rong Dian's avatar
      ENGR00214367-1 power_supply: add get_supplier_property · 83093cf0
      Rong Dian authored
      add get_supplier_property interface.
      This patch was written by: Heikki Krogerus <>
      Signed-off-by: default avatarRong Dian <>
    • Chen Liangjun's avatar
      ENGR00212318 ASRC:update to in/out width config · d85b9d66
      Chen Liangjun authored
      The origin ASRC driver did not support input and output wordwidth
      config but an total wordwidth config instead. And the input wordwith
      and output wordwidth are all fixed to 24 bit.
      In this path, we do things below:
      1 Update to use input wordwidth and output wordwidth config seperately
       instead of an total wordwidth config.
      2 Set corresponding DMA(input/output) buswidth according ASRC's input
      and output wordwidth config.
      3 Support 16/24 bit input wordwidth and 24 bit output wordwidth.
      Signed-off-by: default avatarChen Liangjun <>
    • Peter Chen's avatar
      ENGR00212322-3 usb: add one platform data entry to store anatop base address · 0d22fb7c
      Peter Chen authored
      It is used to usb charger detect, the charger detection process need
      to access anatop register.
      Signed-off-by: default avatarPeter Chen <>
    • Fugang Duan's avatar
      ENGR00210075-3 - SPDC: Add Sipix driver · efdc1b9d
      Fugang Duan authored
      Add Sipix driver for electronic paper dispaly
      - Support RGB565 & Y4 formats with 800x600 resolution
      - Support synchronization update by waiting the last
        request update completed.
      - Support automated update using Linux deferred io mechanism
      - Support for panning(y-direction)
      - Support rotation with 90,180,and 270 degree.
      - Initial integration with ePXP, output Y4 format
      - Support specific waveform modes update.
      - Support Snapshot, Queue and Queue Merge update sheeme.
      - Support full and partial EPD screen updates.
        mode_1 & mode_2: partial update
        mode_0 & mode_3: full update
      - Align waveform mode with EPDC as below:
        mode_init = mode_0;
        mode_gc4  = mode_2;
        mode_A2   = mode_4, mode_du =mode_4;
        mode_gc8  = mode_1, mode_gc16 = mode_1, mode_gc32 = mode_1;
      Signed-off-by: default avatarFugang Duan  <>
    • Wu Guoxing's avatar
      ENGR00209062-2: mx6dq and mx6dl dual camera support · 243302c4
      Wu Guoxing authored
      dual camera support for mx6q and mx6dl:
      1. let mipi and parallel camera working on different csi
      2. the two camera can work independently and synchronously
      3. the two camera will be registered and different video
         device(/dev/video0, /dev/video1)
      4. when both camera are working, the can not use the same
         ipu channel, that is, when camera one using PRP_ENC_MEM
         or PRP_VF_MEM channel, the other one can only use CSI_MEM
         this is the driver part.
      Signed-off-by: default avatarWu Guoxing <>
    • Robby Cai's avatar
      ENGR00209978-2: imx6sl: lcdif: update driver part · c414cdef
      Robby Cai authored
      - use new console lock/unlock
      Board Rework Needed:
       - remove R572, R569, R611 to eliminate conflict with FEC modules.
      Signed-off-by: default avatarRobby Cai <>
    • Sandor Yu's avatar
      ENGR00182769 HDMI: No sound when playing audio in 480p mode · 7ae3e273
      Sandor Yu authored
      It is cause by HDMI audio driver can't get right pixel clock
      from IPU driver if pixel clock source from HSP clock not from
      DI clock.
      HDMI driver get pixel clock by call clk_get_rate() function,
      but the function return actually clock, in some videomode the
      actually pixel clock is not right equal the pixel clock in CEA spec.
      Get pixel clock from video mode struct instead of CCM register.
      480P HDMI audio can work.
      Signed-off-by: default avatarSandor Yu <>
    • Fugang Duan's avatar
      ENGR00209570 - PxP : Add Y4 output format. · 8bd174bf
      Fugang Duan authored
      - Add Y4 output format for SPDC.
      Signed-off-by: default avatarFugang Duan  <>
    • Rong Dian's avatar
      ENGR00181094-4: MAX8903: improve battery charger driver · 3e440e5b
      Rong Dian authored
      1.change the battery driver's name to sabresd_battery.c ,it
      means this driver is only special for sabersd boards.
      2.fix battery charger function bugs and improve driver code.
      Signed-off-by: default avatarRong Dian <>
    • Rong Dian's avatar
      ENGR00181094-2: MAX8903: Add battery charger driver · e40b8633
      Rong Dian authored
      Add battery charger driver on SABRESD_rev.B board.
      Signed-off-by: default avatarRong Dian <>
    • Alan Tull's avatar
      ENGR00179601 Synopsys approved hdmi fifo workaround - rev 3 · c584dd8c
      Alan Tull authored
      This patch includes some of the clk enable/disable changes from rev2
      Check the version of the HDMI IP to determine whether the fifo
      threshold needs to be high.  The i.Mx6dl version of the HDMI doesn't
      need the workaround.  All other parts of the workaround are used
      for both parts for code simplicity.
      For i.Mxq, set the Threshold of audio fifo as: FIFO depth - 2 (fixed
      and independent of the number of channels actually used).
      Use unspecified length ahb bursts (using fixed INCRx will make the
      audio dma fail).
      Additionally and in order to get it working on all conditions it will
      be necessary to run the following sw steps at startup of video and audio
      (or when video changes or audio changes):
      1-Configure AUD_N1 and AUD_CTS1 registers with final value and let the
        AUD_N2, AUD_N3, AUD_CTS2 and AUD_CTS3 to 0s.
      2-Configure start and end addresses of audio DMA registers.
      3-Start DMA operation
      4-Configure the AUD_CTS2 and AUD_CTS3 with the final value.
      5-Configure the AUD_N2 and AUD_N3 with final value.
      Signed-off-by: default avatarAlan Tull <>