• Tony LIU's avatar
    ENGR00217721-4 implement dma_pool_alloc_nonbufferable interface · 651ce784
    Tony LIU authored
    mm core part
    
    - After USB driver prime a bulk transfer(whatever IN or OUT, take
      OUT for example) on ep1, only one dTD is primed, an USB Interrupt
      (bit 0 of USBSTS) will be issued, and find that endptcomplete
      register is 0x2 which means an OUT transfer on ep1 is completed,
      at this time the ep1 out queue head status is 0x1e18000, and next
      dtd pointer is 0x1 which means transfer is done and everything is
      OK, while the dTD token status is 0x2008080 which means this dTD
      is still active, not completed yet.
    - Audio SDMA and Ethernet have the similar issue
    - root cause is not found yet
    - work around:
      change the non-cacheable bufferable memory to non-cacheable
      non-bufferable memory to make this issue disappear.
    Signed-off-by: 's avatarTony LIU <junjie.liu@freescale.com>
    651ce784
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